Showing posts with label 4 ECE. Show all posts
Showing posts with label 4 ECE. Show all posts

Tuesday, August 9, 2011

Technical Questions (Logic design )


These are few technical questions based on logic design

1. Draw the transistor level CMOS #input NAND or NOR gate.After drawing it lot of qestions on that ckt will be asked.
2. Transistor sizing for given rise time and fall time. How do you size it for equal rise and fall time.
3. Given a function whose inputs are dependent on its outputs. Design a sequential circuit.
4. Design a finite state machine to give a modulo 3 counter when x=0 and modulo 4 counter when x=1.
5. Given a boolean equation minimize it.
6. Given a boolean equation draw the transistor level minimum transistor circuit.
7. What is the function of a D-flipflop, whose inverted outputs are connected to its input ?
8. What will you do if you want to drive a large capacitance ?

Technical Questions 1

1. What is the difference between a latch and a flip flop. For the same input, how would the output look for a latch and for a flip-flop.

2. Finite state machines:

(2.1)Design a state-machine (or draw a state-diagram) to give an output '1' when the # of A's are even and # of B's are odd. The input is in the form of a serial-stream (one-bit per clock cycle). The inputs could be of the type A, B or C. At any given clock cycle, the output is a '1', provided the # of A's are even and # of B's are odd. At any given clock cycle, the output is a '0', if the above condition is not satisfied.

(2.2). To detect the sequence "abca" when the inputs can be a b c d.

3. minimize a boolean expression.

4. Draw transistor level nand gate.

5. Draw the cross-section of a CMOS inverter.

6. Deriving the vectors for the stuck at 0 and stuck at 1 faults.

7. Given a boolean expression he asked me to implement just with muxes but nothing else.

8. Draw Id Vds curves for mosfets and explain different regions.

9. Given the transfer characteristics of a black box draw the circuit for the black box.

10. Given a circuit and its inputs draw the outputs exact to the timing.

11. Given an inverter with a particular timing derive an inverter using the previous one but with the required timing other than the previous one.

12. Change the rise time and fall time of a given circuit by not changing the transistor sizes but by using current mirrors. 

13. Some problems on clamping diodes.

Sunday, February 13, 2011

Gate 2011 EC key for all sets


 GATE-2011 Answers of ECE paper:(All 4 sets)
  Set – A                   Set – B                      Set – C                       Set – D
1.         A
34.       A

1.         C
34.       B

1.         A
34.       B

1.         D
34.       B
2.         B
35.       B

2.         C
35.       B

2.         C
35.       B

2.         C
35.       A
3.         A
36.       C

3.         D
36.       C

3.         A
36.       D

3.         A
36.       C
4.         B
37.       C

4.         B
37.       D

4.         D
37.       C

4.         B
37.       C
5.         C
38.       A

5.         B
38.       B

5.         D
38.       B

5.         C
38.       B
6.         A
39.       B

6.           A
39.       B

6.         D
39.       B

6.         A
39.       A
7.         D
40.       A

7.         B
40.       B

7.         A
40.       D

7.         B
40.       D
8.         D
41.       D

8.         A
41.       C

8.         C
41.       D

8.         A
41.       C
9.         D
42.       C

9.         C
42.       C

9.         A
42.       C

9.         B
42.       C
10.       A
43.       D

10.       B
43.       C

10.       A
43.       D

10.       B
43.       C
11.       C
44.       D

11.       A
44.       D

11.       B
44.       A

11.       D
44.       B
12.       A
45.       B

12.       D
45.       A

12.       A
45.       B

12.       C
45.       B
13.       C
46.       B

13.       A
46.       B

13.       C
46.       C

13.       C
46.       B
14.       C
47.       C

14.       C
47.       C

14.       D
47.       A

14.       A
47.       D
15.       D
48.       C

15.       B
48.       C

15.       A
48.       D

15.       C
48.       C
16.       D
49.       C

16.       A
49.       C

16.       B
49.       C

16.       A
49.       D
17.       B
50.       D

17.       A
50.       C

17.       C
50.       C

17.       D
50.       C
18.       A
51.       C

18.       C
51.       D

18.       A
51.       C

18.       D
51.       C
19.       B
52.       D

19.       A
52.       A

19.       B
52.       D

19.       D
52.       A
20.       A
53.       D

20.       D
53.       B

20.       A
53.       D

20.       A
53.       B
21.       C
54.       A

21.       D
54.       D

21.       B
54.       A

21.       C
54.       D
22.       B
55.       B

22.       D
55.       D

22.       B
55.       B

22.       A
55.       D
23.       A
56.       A

23.       A
56.       A

23.       D
56.       C

23.       A
56.       B
24.       D
57.       A

24.       C
57.       C

24.       C
57.       C

24.       B
57.       D
25.       C
58.       C

25.       A
58.       B

25.       C
58.       D

25.       A
58.       A
26.       D
59.       B

26.       C
59.       D

26.       B
59.       A

26.       C
59.       A
27.       B
60.       D

27.       A
60.       A

27.       C
60.       A

27.       B
60.       C
28.       B
61.       B

28.       B
61.       B

28.       A
61.       C

28.       B
61.       D
29.       B
62.       B

29.       A
62.       C

29.       D
62.       D

29.       D
62.       C
30.       C
63.       C

30.       D
63.       D

30.       C
63.       C

30.       D
63.       B
31.       C
64.       D

31.       C
64.       C

31.       C
64.       B

31.       C
64.       B
32.       C
65.       C

32.       D
65.       B

32.       C
65.       B

32.       D
65.       C
33.       D


33.       D


33.       B


33.       A