These are few technical questions based on logic design
1. Draw the transistor level CMOS #input NAND or NOR gate.After drawing it lot of qestions on that ckt will be asked.
2. Transistor sizing for given rise time and fall time. How do you size it for equal rise and fall time.
3. Given a function whose inputs are dependent on its outputs. Design a sequential circuit.
4. Design a finite state machine to give a modulo 3 counter when x=0 and modulo 4 counter when x=1.
5. Given a boolean equation minimize it.
6. Given a boolean equation draw the transistor level minimum transistor circuit.
7. What is the function of a D-flipflop, whose inverted outputs are connected to its input ?
8. What will you do if you want to drive a large capacitance ?
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